Blogs (28) >>
ICFP 2017
Sun 3 - Sat 9 September 2017 Oxford, United Kingdom
Fri 8 Sep 2017 15:30 - 16:00 at L1 - Day 2, Session 5

We present a library in Haskell for programming Field Programmable Gate Arrays (FPGAs), including hardware software co-design. Code for software (in C) and hardware (in VHDL) is generated from a single program, along with the code to support communication between hardware and software over an AXI interface. We present type-based techniques for the simultaneous implementation of more than one embedded domain specific language (EDSL). We build upon a generic representation of imperative programs that is loosely coupled to instruction and expression types, allowing the individual parts to be developed and improved separately. Code generation is implemented as a series of translations between pro- gressively smaller, typed EDSLs, safeguarding against errors that arise in untyped translations. Initial case studies show promising performance.

Fri 8 Sep
Times are displayed in time zone: Greenwich Mean Time : Belfast change

15:30 - 16:30: Day 2, Session 5Haskell at L1
15:30 - 16:00
Hardware Software Co-Design in Haskell
16:00 - 16:30
Streaming Irregular Arrays
Robert Clifton-Everest, Trevor L. McDonellUniversity of New South Wales, Australia, Manuel Chakravarty, Gabriele KellerData61,CSIRO (formerly NICTA) and UNSW